1. Field of the Invention
The present invention relates to an APD (Avalanche PhotoDiode) bias circuit which stably operates an APD receiving a light signal.
As is known, the multiplication factor of the APD can be controlled by a bias current flowing therein. Thus, the bias voltage is controlled in accordance with the light input level, so that the received signal can be maintained at a given level.
2. Description of the Related Art
FIG. 1 shows an optical receiver 100, which includes an APD 101, a bias circuit 102, an equalizer amplifier 103, a timing extractor 104, and a decision making unit 105. An optical input OPTin from an optical transmission line or the like is applied to the APD 101. The bias circuit 102 controls the multiplication factor of the APD 101 in accordance with the level of the optical input OPTin.
The output signal of the APD 101 is equalized by the equalizer amplifier 103. A timing signal corresponding to the bit rate of data is extracted from the equalized signal by the timing extractor 104, and is output as a clock signal CLKout. The clock signal CLKout is also applied to the decision unit 105 as a decision timing signal. The decision unit 105 makes a level decision and outputs reproduced data DATAout.
FIG. 2 is a circuit diagram of a conventional APD bias circuit, which is related to the APD 101, the bias circuit 102, and the equalizer amplifier 103 shown in FIG. 1. A voltage VDD is applied to the APD 101 via resistors R1a and R2a connected in series. A current IAPD flowing in the APD 101 and having a magnitude based on the level of the optical input is applied to the equalizer amplifier 103. A bias control circuit is connected to a node in which the resistors R1a and R2a are connected together. The above bias control circuit includes Vo control circuit 111, a Vo monitor circuit 112, an internal stabilized power source 113, an MOPT adjustment unit 114, a temperature sensor 115, and a temperature control circuit 116. Even if the current IAPD fluctuates due to variations in temperature and the optical input, the Vo control circuit 111 controls a current ICONT to keep the voltage Vo of the node between the resistors R1a and R2a at a given constant level.
The power supply voltage VDD is equal to, for example, 85 V, and the bias setting voltage Vo is equal to, for example, 30 V. By controlling the current flowing in the resistor R1a, it is possible to maintain the bias setting voltage Vo at the constant level. That is, the following equations stand:
Vo=VDDxe2x88x92Io Ra1
Io=ICONT+IAPD
Thus, even if the optical input power changes and the current IAPD is thus changed, the bias setting voltage Vo can be controlled at the constant level by controlling the current ICONT to maintain the current Io at a constant level.
The bias voltage VAPD and the current IAPD applied to the APD 101 are obtained as solutions of the following simultaneous equations:
IAPD=(e?xcex/h c)xcex7M Pinxe2x80x83xe2x80x83(1)
VAPD=(Voxe2x88x92Vin)xe2x88x92R2a IAPDxe2x80x83xe2x80x83(2)
M=1/[1xe2x88x92(VAPD/VB)n]xe2x80x83xe2x80x83(3)
where e is the charge of electrons, xcex is the wavelength of the optical input, h is Planck""s constant, c is the speed of light, xcex7 is the quantum efficiency, M is the multiplication factor, Pin is the average optical input power, VAPD is the bias voltage of the APD, Vo is the bias setting voltage, IAPD is the optical current of the APD, VB is the breakdown voltage of the APD, and n is a value (fitting coefficient) determined by the physical properties of the APD.
As the optical input power Pin increases, the current IAPD flowing in the APD 101 is increased, and the voltage drop developing across the resistor R2a is increased. Thus, the bias voltage VAPD is decreased and the multiplication factor M is also decreased. In contrast, as the optical input power Pin decreases, the current IAPD flowing in the APD 101 is decreased, and the voltage drop developing across the resistor R2a is reduced. Thus, the bias voltage VAPD is increased and the multiplication factor M is also increased.
FIG. 3 is a graph of a multiplication factor vs. optical input level characteristic. In order to widen the dynamic range of the optical receiver, the multiplication factor M is set as high as, for example, about 10-20 at the minimum optical input level, and is set as low as, for example, about 1-3 at the maximum optical input level. The tolerable variation range of the optical input power Pin defines the dynamic range of the optical receiver.
In order to stabilize the APD bias circuit shown in FIG. 2 in a situation in which the optical input power varies, it is proposed, as shown in FIG. 4, to provide a capacitor C2a between the ground and a node connecting the resistor R2a and the APD 101 together. Let xcfx840, xcfx841 and xcfx842 be respectively the time constants of the bias control circuit 110, the bias setting voltage Vo, and the circuit made up of the resistor R2a and the capacitor C2a, the time constant xcfx841 being inversely proportional to the time constant xcfx842.
In this case, it is necessary to determine the time constants xcfx841 and xcfx842 so that the following conditions (a) and (b) are satisfied. The condition (a) requires that, when the optical input is broken or cut off from the maximum receive level, the bias voltage VAPD does not exceed the breakdown voltage VB. The condition (b) requires that, when the optical input rises to the maximum receive level from the input broken level, or when an optical surge is input, the APD current IAPD does not exceed the maximum rated currents of the APD and the equalizer amplifier.
FIGS. 5A, 5B and 5C are graphs related to a case where the optical input is broken from the maximum receive level. More particularly, FIG. 5A shows a variation in the optical input power, FIG. 5B is a variation in the bias voltage, and FIG. 5C is a variation in the APD current. As shown in FIG. 5A, if the optical input power decreases to the optical input broken level from the maximum receive level for a short time of a few microseconds to hundreds of microsecond due to a failure in the optical transmission line or an abnormality at the transmission side, the current IAPD flowing in the APD 101 decreases in accordance with the optical input power. Thus, as shown in FIG. 5B, the bias setting voltage Vo increases based on the time constant xcfx840. Generally, the time constant xcfx840 is a value which does not allow the bias control circuit 110 to follow the variation in the optical input power. Hence, the bias voltage VAPD indicated by the broken line increases and may exceed the breakdown voltage VB.
As shown in FIG. 5C, the APD current IAPD decreases as the optical receive level decreases. However, a breakdown current flows due to a critical situation in which the bias voltage VAPD increases and exceeds the breakdown voltage VB.
FIGS. 6A, 6B and 6C are related to a case where the optical input increases to the maximum optical receive level from the input broken level. More particularly, FIG. 6A shows a variation in the optical input power, FIG. 6B shows a variation in the bias voltage, and FIG. 6C shows a variation in the APD current. As shown in FIG. 6A, if the optical input increases to the maximum receive level from the optical input broken level for a short time of a few microseconds to hundreds of microsecond, the bias setting voltage Vo is maintained at a given level as indicated by the solid line in FIG. 6B. Correspondingly, the bias voltage VAPD remains at the previous level, or gradually decreases.
Thus, as shown in FIG. 6C, the APD current IAPD increases over the absolute maximum rated current because the optical input power increases due to the multiplication factor M still being large. This causes degradation of the APD 101 and a failure of the equalizer amplifier 103.
The above-mentioned conventional circuit can stabilize the voltage Vo by means of the bias control circuit 110, and can control the multiplication factor M of the APD 101 to a desired level in accordance with the optical input level. However, as shown in FIGS. 5A-5B and 6A-6C, an abrupt variation in the optical input level causes the bias voltage to exceed the breakdown voltage VB to be applied to the APD 101, and causes the current IAPD to exceed the maximum rated current to flow therein, so that the APD 101 is degraded.
With the above in mind, it is conceivable to improve the response speed of the bias control circuit 110 and makes it possible to follow variation in the APD current IAPD at high speed, so that the voltage Vo can be controlled at the constant level. However, there is a limit to improvement of the response speed because the bias control circuit 110 includes operational amplifiers and stable control operation must be performed. Thus, it is difficult to stabilize the voltage Vo at the constant level when the optical input abruptly changes from the maximum receive level to the broken level or vice versa.
It is desirable to set the time constant xcfx842 defined by the resistor R2a and the capacitor C2a to a large value in order to suppress an increase of the bias voltage VAPD. However, to the contrary, it is desirable to set the time constant xcfx842 to a small value in order to suppress an increase of the APD current IAPD flowing when the optical input changes from the input broken level to the maximum light receive level.
Thus, the conventional configuration cannot achieve the stable control in the case where the optical input changes from the maximum receive level to the input broken level and in the case where the optical input changes from the input broken level to the maximum receive level. In order to avoid the above-mentioned drawbacks, it is conceivable to form the bias control circuit 110 by high-speed transistors to increase the response speed. However, this is not economical and practical.
It is an object of the present invention to provide an APD bias circuit in which the above-mentioned disadvantages are eliminated.
A more specific object of the present invention is to provide an APD bias circuit which stably operates the APD even if an abrupt change in the optical input power occurs.
The above objects of the present invention are achieved by an APD bias circuit adapted to a circuit including an APD receiving an optical signal, and an equalizer amplifier receiving an output signal of the APD. The APD bias circuit includes: first, second and third resistors connected in series to the APD to which a bias voltage is applied therethrough; a bias control circuit connected to a first node between the first and second resistors, the bias control circuit receiving a current from the first node so that a voltage of the first node can be maintained at a constant level; a first capacitor connected between a ground and a second node between the second and third resistors; and a second capacitor connected between the ground and a third node between the third resistor and the APD, a first time constant defined by the second resistor and the first capacitor being greater than a second time constant defined by the third resistor and the second capacitor.